From ehrice@his.com Fri Dec 29 13:20:04 CST 1995 Article: 127033 of alt.folklore.computers Xref: uchinews alt.folklore.computers:127033 Path: uchinews!vixen.cso.uiuc.edu!newsfeed.internetmci.com!in1.uu.net!news.cais.net!news.his.com!user From: ehrice@his.com (Edward Rice) Newsgroups: alt.folklore.computers Subject: Re: Space Shuttle Computers Date: Tue, 26 Dec 1995 13:59:10 -0500 Organization: New Dominion Software Lines: 34 Message-ID: References: <81368-818825976@mindlink.bc.ca> <4b6vjl$eeq@barnacle.iol.ie> <4bfsfd$933@panix2.panix.com> <4bi6vm$2aq@dns.plano.net> <4bip50$dh4@fly.HiWAAY.net> <4bjqg4$iu1@barnacle.iol.ie> <4bnvsl$47@dns.plano.net> <4boji8$tln@barnacle.iol.ie> NNTP-Posting-Host: ehrice.his.com Status: R In article <4boji8$tln@barnacle.iol.ie>, spalding@iol.ie (Nick Spalding) wrote: > Charles Richmond wrote: > > > >So it is *well* established that core memory retains its contents when the power is shut off. It should also be noted that the manuf= > >acture of core memory is a great deal more troublesome that electronic RAM. > >(Thank you, Dr. Wang.) > > I think the reject rate was somewhat lower for core though Ektually, not really. Core-stringing was never a mechanized process. ALL suppliers relied on little old ladies with high-powered magnifiers and bright lights, sewing their way through the kilobytes. When they goofed, only the most trivial errors could be corrected. If a core snapped in the middle of an array, that array was useless. To get around this, the planes were sometimes strung with extra arrays, and if testing showed 1, 2, 3, ..., 32, 34, 35, ... to be good but 33 to be bad, they'd manually wire #33 out of operation. I never heard of the whole process being low-defect, and of course it was /very/ low volume. I'm going to take a rough guess and say that even with today's pretty-good-yields in US and Japanese manufacturing, more semiconductor bits are rejected today in a week than were ever made from ferrite cores throughout the life of that technology. "Nobody has a 'Bruce Ediger' quote in their .sig - not even me." -- Bruce Ediger From jones@pyrite.cs.uiowa.edu Fri Dec 29 13:21:55 CST 1995 Article: 127048 of alt.folklore.computers Xref: uchinews alt.folklore.computers:127048 Path: uchinews!vixen.cso.uiuc.edu!newsfeed.internetmci.com!in1.uu.net!news.uiowa.edu!usenet From: jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) Newsgroups: alt.folklore.computers Subject: Re: Bad core, Was:Space Shuttle Computers Date: 26 Dec 1995 21:28:12 GMT Organization: University of Iowa, Iowa City, IA, USA Lines: 40 Distribution: world Message-ID: <4bppdc$p5q@flood.weeg.uiowa.edu> References: NNTP-Posting-Host: pyrite.cs.uiowa.edu Status: R > Edward Rice (ehrice@his.com) writes: > > I think the reject rate was somewhat lower for core though > > Ektually, not really. Core-stringing was never a mechanized process. ALL > suppliers relied on little old ladies with high-powered magnifiers and > bright lights, sewing their way through the kilobytes. When they goofed, > only the most trivial errors could be corrected. If a core snapped in the > middle of an array, that array was useless. Having a fair number of working core planes to my name (4K and 8K by 12 bit core planes for my PDP-8 computers), if you look at the things with a magnifying glass (DEC was nice, they put plexiglass over the core plane instead of aluminum, as favored by some other manufacturers), you can see a fair number of repairs -- typically, what you see is a little black blob on one of the wires -- each such blob is a splice, soldered and insulated with a dab of varnish. Given that the wires are about 40 gauge and that the cores are, perhaps, 1mm outside diameter, the core planes must have been fun to make! I also have some good 32K by 16 bit planes that I haven't dared open up -- as far as I know, they're in working condition, and if I can ever get documentation, it would be a blast to build a computer that used them. Anyway, core plane manufacture was semi-automated throughout the 1970's. Typical tricks involved shaking tables to prepare correctly oriented stacks and later arrays of unstrung cores, and I gather, towards the end, there were wire feeders that could shove wires down a row of aligned cores with only a little help from a human operator. Remember, the advances in core-plane manufacture during the 1970's were huge! In the early '70s, a plane of 4K by 12 or 16 bits was a typical size. By the end of the decade, 64Kb planes were commonplace and you could get significantly larger. As a result, the transition from core to semiconductur RAM was a long drawn out affair, with core being preferred for the large memories whild semiconductor RAM was preferred for the smaller ones. Doug Jones jones@cs.uiowa.edu From uchinews!ux1.cso.uiuc.edu!howland.reston.ans.net!usc!sdd.hp.com!caen!destroyer!news.iastate.edu!hobbes.physics.uiowa.edu!news.uiowa.edu!news Thu Feb 18 21:31:02 CST 1993 Article: 34552 of alt.folklore.computers Newsgroups: alt.folklore.computers Path: uchinews!ux1.cso.uiuc.edu!howland.reston.ans.net!usc!sdd.hp.com!caen!destroyer!news.iastate.edu!hobbes.physics.uiowa.edu!news.uiowa.edu!news From: jones@pyrite.cs.uiowa.edu (Douglas W. Jones,201H MLH,3193350740,3193382879) Subject: Re: Looking for core memory Sender: news@news.uiowa.edu (News) Message-ID: <1993Feb17.035625.24494@news.uiowa.edu> Date: Wed, 17 Feb 1993 03:56:25 GMT References: <1993Feb17.003518.27027@ichips.intel.com> Nntp-Posting-Host: pyrite.cs.uiowa.edu Organization: University of Iowa, Iowa City, IA, USA Lines: 42 Status: R >From article <1993Feb17.003518.27027@ichips.intel.com>, by markg@pdx820 (Mark Gonzales): > > ...So the clever telephone engineers made 9 huge cores, one > for each option. Each core was about 12" diameter. They allocated a > sense wire to each subscriber. If the particular option was on, the > sense wire was routed through the core, otherwise not. What you've just described is called a "braided wire memory". The technology was fairly common in the days before monolithic ROM was commonplace. Prior to that, small ROMs were done with diode matrices. The circuit was essentially the same as the circuit for a modern fusable link TTL ROM, except that it was done with discrete components and you used wire cutters to remove the unwanted diodes at programming time. The very first discussion of microprogramming in the modern era was written by Maurice Wilkes in terms of this technology. (Prior to the modern era, Babbage used microprogramming in his analytical engine, using a music box mechanism to hold the microcode -- his son built a prototype in the late 19th century and it now sits in a museum in London, where you can look at the ROM). Capacitive readout ROM was also tried. IBM made a machine where the microcode was stored on mylar punched cards -- there were 12 words of 80 bits each per card, and the capacitance of the card was changed by punching out the hole. Users with a stock of mylar cards could remicroprogram the machine, and you can read about it in Bell and Newell, Computer Structures, Readings and Examples (first edition). Finally, braided wire memory became the preferred technology for large capacity ROM systems in the late 1960's. DEC sold PDP-14 industrial controllers with this memory technology, where the total ROM capacity was 4K 12 bit words. DEC also used this ROM technology in their MR8-E read-only memory option for the PDP-8/E. Hewlett Packard used it in the HP 9100 programmable calculator to store the high level microprogram that interpreted user programs. The same calculator used a low level microprogram, stored in a diode matrix, to handle the interpretation of the high level microcode. The whole thing was one of the smallest programmable computers ever made without the aid of integrated circuits (1/2 the volume of an ADM/31, including CRT display!) Doug Jones jones@cs.uiowa.edu